is the
execution time of the simulator using N processors divided
by the execution time of the simulator using 1 processor.
The speedups of the simulators are shown in
Figure 5.8. For the LU and MG
benchmarks, speedups are shown for the fast simulators, since
the NMP+CEP+Det mode could not detect the determinism in the
applications.
The speedups for
the LU benchmarks are relative to the smallest host
processor configuration that could be used to run the
simulator. For example, the 8 target processor simulator could
be executed on 2, 4 or 8 host processors. Hence, the
reference execution time is of the 2 processor simulation.
Notice that the speedups achieved by the simulation are characteristic of the application itself, since the simulation overhead is very little.
Figure 5.8: Fast Simulator Speedups